1. Field of the Invention
The invention relates to a low drop-out (LDO) voltage regulator, and more particularly to eliminating stability problems for LDOs with very low bond wire resistance or no bond wires at all.
2. Description of the Related Art
Currently, low drop-out (LDO) voltage regulators which use advanced techniques usually require that the bond wire impedance is within a reasonably tightly controlled range in order that the LDO is stable. However, the move to advanced package types will mean that no bond wires are used where these LDOs easily become unstable. Many solutions to the above problems associated with unstable LDOs have been proposed in the related art, many with complex and thus costly schemes. Reference is made to U.S. Pat. No. 6,856,124, entitled “LDO Regulator With Wide Output Load Range And Fast Internal Loop” issued Feb. 15, 2005 and assigned to the assignee of this application. That patent shows a method and a circuit to achieve a low drop-out voltage regulator with a wide output load range. A fast loop is introduced in the circuit. The circuit is internally compensated and uses a capacitor to ensure that the internal pole is more dominant than the output pole as in standard Miller compensation. The quiescent current is set being proportional to the output load current. No explicit low power drive stage is required. The whole output range is covered by one output drive stage. This technique however does not address the above mentioned problem with the very low resistances that are associated with the absence of bond wires. What is needed is an easy-to-implement and cost effective solution which will insure that the LDO remains stable with a minimal amount of degradation in performance or current consumption. These needs are met by the present invention, which assures a stable circuit between equivalent series resistance (ESR) ranges of 100 mΩ and 1 mΩ.
U.S. patents which relate to the subject of the present invention are:
U.S. patent application Ser. No. 7,710,091 B2 (Huang) discloses an LDO voltage regulator which utilizes nested Miller compensation and pole-splitting to move the dominant pole to the output of a first-stage amplifier. An active resistor is arranged in the feedback path of a Miller capacitor to increase the controllability of the damping factor.
U.S. patent application Ser. No. 7,679,437 B2 (Tadeparthy et al.) describes a split feedback technique and a scheme for improving the degradation of load regulation caused by additional metal resistance in an amplifier (an LDO) of the type wherein a feedback loop for the amplifier is deployed and where the feedback loop might be viewed as including a feedback resistance and a capacitance connected in parallel.
U.S. Pat. No. 7,656,139 B2 (van Ettinger) shows a negative feedback amplifier system in which part of the supplied output current is diverted through a first “zero” resistor before adding it to the output voltage, and also using a second “boost zero” compensating resistor between the amplifier and the first current control element.
U.S. Pat. No. 7,589,507 B2 (Mandal) teaches a stability compensation circuit for an LDO driving a load capacitor in a range of few nano-Farads to few hundreds of nano-Farads with a good phase margin over a no load to full load current range, and maintains minimum power area product for an LDO suitable for a SoC integration.
U.S. Pat. No. 7,323,853 B2 (Tang et al.) presents an LDO voltage regulator which comprises an error amplifier with a common-mode feedback unit, a pass device, a feedback circuit, and a compensation circuit to provide a stable output voltage with a high slew rate and simple configuration when the load capacitance has a large range.
It should be noted that none of the above-cited examples of the related art provide the advantages of the below described invention.